Front Side Bus VS HyperTransport Technologies

Front Side Bus VS HyperTransport Technologies

Lately when I have been going over my technology articles, I have been either referencing directly either Intel technology or tech that relates directly to Intel.  This is not because I prefer Intel (maybe) but because there is just so much more information about Intel technology.  On Wikipedia, there is a 3 page article about the FSB while there is only 3 sentences about the HyperTransport bus that AMD has been uses for the past several years.  Because of this lack of information and because 90% of our computers are Intel is why I believe I have been skipping over AMD technology.

Now, I constantly hear about which is better when it comes down to FSB (Front Side Bus) versus HT (HyperTransport) technologies.  I know a great deal about the FSB structure and technology, but am totally clueless when it comes to HT.  I hope in this article not only to enlighten you about these technologies and their differences, but me as well.

History

Front Side Bus

The FSB started out as the parallel bus that connected all components on the motherboard.  Since then, point to point serial connections replace the FSB in other connections (SATA, PCI-Express, DMI) and left the CPU as the only connection using the FSB connecting to the FSB.  While it is an old and aging technology, it is cheap and easy to implement, and any number of processors can use this single bus at a time.  However bandwidth cannot scale up to meet the needs of current generation hardware and is soon becoming the bottleneck in high end systems.

HyperTransport

HT started with the release of the Athlon 64, AMD's direct competition to Intel's Pentium 4,  in 2003.  AMD figured that the FSB would slow down and kill their efficiency advantage, which was AMD's selling point.  By putting the memory controller directly on the processor chip, the FSB was no longer needed to connect processor and memory via the chipset.

Technology

Front Side Bus

The current generation FSB is a 64-bit wide parallel bus running at speeds from 266 MHz to 400 MHz.  This bus is quad-rate (send 4 bits per clock cycle) so the effective FSB speeds are 1066 MHz to 1600 MHz.  It is a direct connection between processor and Northbridge of the chipset.

Most other clocks in the motherboard and system are either directly or indirectly based on the FSB clock.  Please see the following link for more information about how all the different frequencies are based on the FSB.  All About The Different Frequencies and Speeds Inside A Computer.

HyperTransport

HT is a serial connection much like the PCI-Express bus used for video cards.  It has a 32-bit data width in duplex running at speeds from 200 MHz to 2.6 GHz.  It achieves this unusually high clock rate via the LDT multiplier, which could vary from 1x to 5x.  HT also runs in DDR much like memory today, so that the 2.6 GHz clock produced 5.2 GT/s.

HyperTransport is able to directly negotiate bit widths and frequency speeds between devices.  That means that the 32-bit width can handle 1x 32-bit or 2x 16-bit or 4x 8-bit and any other number of bit widths and frequencies.

Bandwidth

This is where AMD says the technology matters.  More bandwidth means faster processors will be able to do more when more data comes to them faster.  With DDR3 ram bandwidth now exceeding 25 GB/s, you can see that AMD is ready to accept all that bandwidth.

Front Side Bus

Since the FSB is 64-bits and runs between 1066 MT/s and 1600 MT/s, we can effectively determine the bandwidth.

HyperTransport

HT recently has been running from 800 MHz from the low-end processors up to 4.0 GHz on the newest quad core processors.  That is taking into account the clock multiplier but not the DDR.  Since the bit-width is 32, determining the bandwidth is possible.

As you can clearly see, HT is up to 300% faster in total bandwidth and 200% faster in a single direction.  However, this bandwidth is for the total HT bandwidth, which must also be shared with other resources such as I/O devices and North and South bridges of the chipset.  Usually the split is that processor, chipset, and memory link uses 16 lanes while the rest of system uses the other 16 lanes.  This means that the bandwidth between these devices is 16 GB/s or higher depending on the negotiation between devices.  The connection between processor and devices is called the Direct Connect Architecture (DCA).

Conclusion

Front Side Bus

With the advent of DDR3 memory and 3.2 GHz quad-cored chips, the FSB is finally being saturated.  Sure Intel may come out with a faster FSB, but memory and processors will get much faster by then.  Intel knows this and is doing the same thing that AMD did a few years ago, get rid of the FSB.  It will operate much like the AMD HT and will be named the Intel Quickpath Connect.  It will debut on the new Intel architecture chips codenamed "Nehalem".

HyperTransport

Yes the HyperTransport is a superior technology which greatly exceeds the bandwidth and speeds of the FSB.  However, AMD has been slow to adopt DDR3 and quad-core technology.  Also its current gen quad-core chips (Barcelona and Phenom) are not able to match the frequencies and performance of the Core 2 Quad processors.  It may be a superior technology, but if the components are slow, then a faster bus does not matter.